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ARM EN0-001 - ARM Accredited Engineer

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Total 210 questions

Under which of the following circumstances would a DSB instruction be used?

A.

In a multi-threaded system, when two threads need to be synchronized at a particular point

B.

When accessing a peripheral, it is necessary to halt until the memory access is complete

C.

When it is necessary to temporarily disable interrupts while carrying out a particular memory access

D.

In a multiprocessor system, when it is necessary to halt one of the cores while the other completes a critical task

Which of the following is preserved in dormant mode?

A.

Core register contents

B.

CP15 (system) register settings

C.

Debug state

D.

Cache contents

When timing a critical function for an algorithm, using platform time functions such as get time of day (), the result is unpredictable; there is significant variance in the measured time between different runs of the benchmark. Which of the following strategies would improve the accuracy of the measurement?

A.

Time multiple executions of the algorithm and average the result

B.

Break the algorithm into smaller pieces and time them individually

C.

Run the code on a software model of the platform and collect the results on that system

D.

Add some code with a known overhead to the algorithm to make it run slower, and remove the overhead afterwards

A deeply embedded real-time industrial control system is missing some hard real-time interrupt deadlines. Which of the following performance analysis techniques is the most suitable for identifying which routines are causing the problem?

A.

Use an ETM instruction trace profiler, which outputs information about the program as it runs

B.

Add some serial logging to the software, which outputs information about the program as it runs

C.

Add a new interrupt handler, which is triggered off a timer, and dump information about the interrupted process

D.

Use a JTAG sample-based profiler, which periodically halts the CPU, and dumps information about the interrupted process

Which of the following functions can be performed by a spinlock?

A.

Encrypting sensitive data on a network

B.

Preventing interrupts from being received by a CPU

C.

Preventing unauthorized access to an ARM powered device

D.

Protecting a critical section or data structure from concurrent access

Which of the following sequences of stages comprise the ARM7TDMI three-stage pipeline?

A.

Fetch, Decode, Execute

B.

Decode, Fetch, Execute

C.

Execute, Fetch, Decode

D.

Fetch, Execute, Execute

When applied to locations in memory configured using a write-back cache strategy, what does a data cache 'clean' operation do?

A.

Writes dirty data cache lines to memory

B.

Reloads dirty data cache lines from memory

C.

Speculatively preloads data into the cache

D.

Writes dirty data cache lines to memory and marks those lines as invalid

What side-effect could using a debugger to read memory contents have?

A.

The memory contents could be set to zero

B.

Some memory contents could be rewritten

C.

The processor MMU pagetables could be modified

D.

The processor cache could be cleaned or/and invalidated

Assume a Big-Endian (BE) memory system with the following memory contents.

Byte Address Contents

0x100 0x11

0x101 0x22

0x102 0x33

0x103 0x44

If R5 = 0x100, what are the contents of R4 after performing the following operation?

LDR R4, [R5]

A.

0x11223344

B.

0x44332211

C.

0x22114433

D.

0x33441122

Which of the following processors includes a Generic Interrupt Controller as a standard component?

A.

Cortex-A8

B.

Cortex-M3

C.

Cortex-R4F

D.

Cortex-A9 MPCore