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ARM EN0-001 - ARM Accredited Engineer

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Total 210 questions

It is common to declare structures as "packed" in order to minimize data memory size. Which of the following accurately describes the effect of this?

A.

Members will be stored as bit-fields

B.

Data Aborts will be disabled for all structure accesses

C.

Structure members will be re-ordered so that the smallest are first

D.

Multi-byte members are not required to be naturally aligned

Why does Device memory prohibit speculative accesses?

A.

Speculative accesses might waste energy

B.

Speculative accesses might reduce performance

C.

Speculative accesses might cause unwanted cache coherency traffic

D.

Speculative accesses might cause undesired system state changes

Consider the following instruction sequence:

STR r0, [r2] ; instruction A

DSB

ADD r0, r1, r2 ; instruction B

LDR r3, [r4] ; instruction C

SUB r5, r6, #3 ; instruction D

At what point will execution pause until the STR access is complete?

A.

After instruction A and before the DSB

B.

After the DSB and before instruction B

C.

After instruction B and before instruction C

D.

After instruction C and before instruction D

What type of debug point would you set when debugging flash memory or ROM?

A.

Start point

B.

Step point

C.

Hardware breakpoint

D.

Software breakpoint

Which TWO of the following mechanisms cause the ARM processor to take an abort? (Choose two)

A.

MPU fault

B.

External memory system error

C.

Bounced coprocessor instruction

D.

Unrecognized instruction opcode

E.

Illegal operands for a data-processing instruction

Which THREE of the following items should be preserved by software when entering dormant mode? (Choose three)

A.

Current Program Status Register (CPSR)

B.

Contents of the Level 2 data cache

C.

The Floating Point Status and Control Register (FPSCR)

D.

All User mode general-purpose registers

E.

The CP15 Multiprocessor Affinity Register

F.

Contents of the Level 1 data cache

An Advanced SIMD intrinsic has the prototype:

int16x4_t vmul_n_s16(int16x4_t a, int16_t b);

How many multiplications does this intrinsic compute?

A.

1 multiplication

B.

4 multiplications

C.

16 multiplications

D.

64 multiplications

Which of the following is a REQUIRED feature in the ARMv7 architecture?

A.

The Thumb-2 instruction set

B.

NEON

C.

Integer division instructions

D.

A memory management unit

When using an Operating System, which of the following operations can NOT typically be done by user processes?

A.

Reading the link register (R14)

B.

Reading data from the user stack

C.

Changing from ARM state to Thumb state

D.

Changing the interrupt mask bits (A, I, F) in the CPSR

LDREX and STREX were introduced in which ARM architecture version?

A.

ARMv5TE

B.

ARMv6

C.

ARMv6K

D.

ARMv7